Watch this video to learn how a complex SoC platform was mapped into a single Virtex®-7 2000T FPGA, the world’s largest 3D IC in volume production. With well over 2 million logic cells, the Virtex-7 2000T reduces the need for design partitioning and simplifies the mapping of ASIC RTL. This breakthrough capacity coupled with Xilinx’s Next Generation Vivado™ Design Suite provides the ideal solution to tackle the demands of leading edge ASIC and SoC devices.
本视频将向大家展示业界首款且唯一的20nm高端系列器件——Virtex UltraScale VU905 FPGA——集成有GTY收发器、32.75G短距以及28.21G背板，非常适合于下一代400G以及500G有线网络系统的实现。
了解最新的Vivado设计套件2014.1版都有哪些更新和升级？包括全新的赛灵思 Tcl 库和新的时序约束向导，以及全新的简化安装程序等等。
